Modeling, Synthesis, and Rapid Prototyping with the VERILOG (TM) HDL - Michael D. Ciletti

Modeling, Synthesis, and Rapid Prototyping with the VERILOG (TM) HDL

Michael D. Ciletti

出版社

Prentice Hall

出版时间

1999-03-18

ISBN

9780139773983

评分

★★★★★
书籍介绍

Designed for advanced undergraduate and graduate computer science, computer engineering and electrical engineering courses in digital design and hardware description languages, this textbook presents an integrated treatment of the Verilog hardware description language (HDL) and its use in VLSI, circuit modeling/design, synthesis, and rapid prototyping. This product is a selection from the Xilinx Design Series.

收藏